VSC Training Course: Intel Software Tools Training Workshop, May 28-30, 2018


    This 3 days workshop offers a deep dive Intel tools training at the Vienna Scientific Cluster, organized in cooperation with and sponsored by Intel:

    1st day, May 28, 2018:
    Getting more Python Performance with Intel® optimized Distribution for Python
    Introducing the background of the Intel Python distribution and explaining why it is faster than a plain vanilla Python distribution running on Intel architectures the students will be guided with hands-on exercises to apply techniques on how to get the best performance out of Python.
    Prerequisites: Basic knowledge of programming and ideally also Python language.
    Full description and agenda of the 1st day

    2nd day, May 29, 2018:
    Optimizing your Application for Speed – Performance Analyzer Intel VTune Amplifier XE
    This day will focus on performance analysis, as well as tuning shared memory systems. General programming issues and common (parallel) performance bottlenecks will be discussed and addressed during the hands-on training and we will show how to resolve them.
    Prerequisites: Basic understanding of parallel programming paradigms and C/C++ or Fortran programming as well as a general understanding of microprocessor architectures.
    Full description and agenda of the 2nd day

    3rd day, May 30, 2018:
    Overcome Vectorization Bottlenecks in your Application – Using Intel Advisor XE and the new Roofline component
    To get close to the optimal performance the computer system provides it is mandatory to make best use of the vector facility that is available in all modern processors. However, automatic compiler vectorization frequently needs support from the developer and we will explain how to do that. On top we will use the Intel Advisor XE component and the Intel Roofline to show how to improve the performance by vectorizing applications efficiently.
    Prerequisites: Intermediate experience with one of the programming languages C/C++ or Fortran.
    Full description and agenda of the 3rd day


    Here is the Agenda and Description for the 3 days Workshop.


    See above for the individual days.


    Frank Schlimbach [1st day, Python]
    Michael Steyer [2nd day, Performance optimization], and
    Cedric Andreolli [3rd day, Vectorization]

    (Intel GmbH, Munich, Germany)



    Date, Time, and Location:

    28. - 30.05.2018, Registration starts at 9:45 each day,

    28.05.2018, 10:00 - 18:00 (optional: get-together dinner at "Wieden Bräu" sponsored by Intel),
    29.05.2018, 10:00 - 17:00,
    30.05.2018, 10:00 - 16:45,

    FH Internet-Raum FH1 (TU Wien, Wiedner Hauptstraße 8-10, ground floor, red area)


    Registration for this course is closed.

    Registration is possible for the entire 3 days workshop or for single selected days.

    Registration deadline is Sunday, May 13, 2018, with priority rules. Acceptance will be approved on May 14, 2018. As long as seats are available there will be an extended registration period without priority rules.

    Priority for acceptance: first - active users of the VSC systems, second - students and members of Austrian universities and public research institutes, third - other applicants.


    This event is organized in cooperation with and sponsored by Intel.

    Therefore, the workshop is free of charge for all participants.

    At this event coffee breaks, lunches (at "Cafe Restaurant Resselpark"), and a get-together dinner on the first evening (May 28 at "Wieden Bräu") will be provided and sponsored by Intel.


    A link to the presentation slides will be provided at course start to the participants.

    Local Organizer and Contact:

    Claudia Blaas-Schenner, vsc-seminar@list.tuwien.ac.at


    Training events of VSC:

    Opens external link in new windowvsc.ac.at/training